Test MP+dmb.sy+ctrl-rfi-pos-[fr-rf]-addr

AArch64 MP+dmb.sy+ctrl-rfi-pos-[fr-rf]-addr
"DMB.SYdWW Rfe DpCtrldW Rfi PosRR FrLeave RfBack DpAddrdR Fre"
Cycle=Rfi PosRR FrLeave RfBack DpAddrdR Fre DMB.SYdWW Rfe DpCtrldW
Relax=
Safe=Rfi Rfe Fre PosRR DMB.SYdWW DpAddrdR DpCtrldW [FrLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpCtrldW Rfi PosRR FrLeave RfBack DpAddrdR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X9=x;
2:X1=z;
}
 P0          | P1                  | P2          ;
 MOV W0,#1   | LDR W0,[X1]         | MOV W0,#2   ;
 STR W0,[X1] | CBNZ W0,LC00        | STR W0,[X1] ;
 DMB SY      | LC00:               |             ;
 MOV W2,#1   | MOV W2,#1           |             ;
 STR W2,[X3] | STR W2,[X3]         |             ;
             | LDR W4,[X3]         |             ;
             | LDR W5,[X3]         |             ;
             | LDR W6,[X3]         |             ;
             | EOR W7,W6,W6        |             ;
             | LDR W8,[X9,W7,SXTW] |             ;
Observed
    z=2; y=1; x=1; 1:X8=1; 1:X6=1; 1:X5=2; 1:X4=2; 1:X0=1;
and z=2; y=1; x=1; 1:X8=1; 1:X6=1; 1:X5=2; 1:X4=2; 1:X0=0;
and z=2; y=1; x=1; 1:X8=0; 1:X6=1; 1:X5=2; 1:X4=2; 1:X0=0;